Drain extended MOSFET (DEMOS) devices are designed to accommodate relatively high supply voltages, which allow circuits to be built in standard digital CMOS technologic that can be directly connected to a battery. Such circuits are capable of providing current to a load by way of a high-side switch connected to the battery. The high-side switch is driven by high-side digital logic, having a high-side high level (e.g., a high-side supply voltage) equal to the battery voltage and high-side low level (e.g., a high-side “ground” voltage) equal to the battery voltage minus the digital core supply voltage.
To transmit signals between a low-side digital logic of an electric circuit (e.g., the digital core) having a first voltage potential and a high-side digital logic of an electric circuit having a second voltage potential greater than the first voltage potential (and vice versa) level shifter circuits are used. For example, level shifter circuits are frequently used in -high-side driver circuits (HSD) to provide a sufficient gate-to-source voltage to drive a high-side switch.
FIG. 1 illustrates a block diagram of a high voltage gate driver circuit 100 having a level shifter circuit 102 configured to translate differential signals from a low-side (Vin1 and Vin2) to a high-side (Vout1, Vout2). The high voltage gate driver circuit 100 comprises a high-side driver 104 connected to the gate of a high-side switch 108 (e.g., a power field effect transistor having a source connected to a battery voltage and a drain connected to a node) and a low-side driver 106 connected to the gate of a low-side switch 110 (e.g., a power field effect transistor having a source connected to the node and a ground terminal).
If the high-side switch 108 is a PDEMOS device, a voltage smaller than the potential at the source minus the threshold voltage is needed to turn on the device (e.g., in contrast to the low-side switch 110, in which source is connected to ground, so that a voltage larger than the threshold voltage turns on the device). Therefore, level shifter circuit 102 is configured to translate low-side signals (Vin1, Vin2) to high-side signals (Vout1, Vout2), having a sufficient gate-to-source voltage to drive a high-side switch 110.